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Computer Systems Architecture

Total questions: 94

Worksheet time: 48mins

Name
Class
Date
1.

It is a communication pathway that connects two (2) or more devices or modules used for transferring data.

a)

Computer Bus

b)

Data Bus

c)

Address Bus

d)

Control Buss

2.

What consists of a set of conductors such as ribbon cables, external cabling, copper tracks on a printed circuit board, microscopic aluminum trails on the surface of a silicon chip, and many other forms?

a)

Computer Bus

b)

Data Bus

c)

Address Bus

d)

Control Buss

3.

What allows each device connected, in the form of trailings or wires, to transmit a bit of data (1 or 0), making the collection of wires capable of transferring a byte or a word at a time depending on its width?

a)

Computer Bus

b)

Data Bus

c)

Address Bus

d)

Control Buss

4.

In reality, each bus consists of how many distinct physical lines divided into three (3) subassemblies?

a)

50 to 100 distinct physical lines

b)

1 to 50 distinct physical lines

c)

1 to 500 distinct physical lines

d)

100 to 150 distinct physical lines

5.

Also known as Memory Bus

a)

System Bus

b)

Address Bus

c)

Data Bus

d)

Control Bus

6.

Also known as Command Bus

a)

System Bus

b)

Address Bus

c)

Data Bus

d)

Control Bus

7.

What is the unidirectional bus that transports memory addresses which the processor wants to access to read or write data?

a)

System Bus

b)

Address Bus

c)

Data Bus

d)

Control Bus

8.

What is the bidirectional bus that transfers instructions coming from or going to the processor?

a)

System Bus

b)

Address Bus

c)

Data Bus

d)

Control Bus

9.

What is the bidirectional bus that transports orders and synchronization signals coming from the control unit and traveling to all other hardware components, and also transmits response signals from the hardware?

a)

System Bus

b)

Address Bus

c)

Data Bus

d)

Control Bus

10.

Which data transmission method is normally used for long-distance data transfer and when the amount of data is relatively small?

a)

Serial

b)

Parallel

c)

Singly

d)

Doubly

11.

Which data transmission method ensures data integrity by sending data bits one by one in a specific order?

a)

Serial

b)

Parallel

c)

Singly

d)

Doubly

12.

In which transmission method are multiple data bits transmitted over multiple channels at the same time?

a)

Serial

b)

Parallel

c)

Control Bus

d)

Memory Bus

13.

Data can be sent faster than using serial transmission methods.

a)

Serial

b)

Parallel

c)

Control Bus

d)

Memory Bus

14.

In which type of bus protocol are data bits transmitted as a continuous stream synchronized with a master clock?

a)

Wired

b)

Wireless

c)

Synchronous

d)

Asynchronous

15.

Which type of bus protocol does not use start bits, stop bits, and gaps?

a)

Parallel

b)

Serial

c)

Synchronous

d)

Asynchronous

16.

Which protocol is highly dependent on correct timing synchronization between devices?

a)

Parallel

b)

Serial

c)

Synchronous

d)

Asynchronous

17.

Which bus protocol uses start bits and stop bits to synchronize data transmission?

a)

Parallel

b)

Serial

c)

Synchronous

d)

Asynchronous

18.

In which type of bus protocol can data bits be sent at any point in time?

a)

Data Bus

b)

Address Bus

c)

Synchronous

d)

Asynchronous

19.

In asynchronous transmission, what is used to provide time between data transmissions?

a)

Control Lines

b)

Gaps

c)

Clock Pulses

d)

Address Signals

20.

What does a bus transfer from one place to another?

a)

Electrical signals

b)

Magnetic fields

c)

Sound waves

d)

Radio signals

21.

What travels between the CPU and memory along the data bus?

a)

Clock signals

b)

Data

c)

Addresses

d)

Instructions only

22.

Characteristics of Computer Bus


All types of buses found in computer transfer data between computer peripherals

connected to it.

a)

Data Sharing

b)

Addressing

c)

Power

d)

Timing

23.

Characteristics of Computer Bus


A bus has address lines that match those of the processor. This allows data to be sent to

or from specific memory locations.

a)

Data Sharing

b)

Addressing

c)

Power

d)

Timing

24.

Characteristics of Computer Bus


A bus supplies power to various peripherals connected to it.

a)

Data Sharing

b)

Addressing

c)

Power

d)

Timing

25.

Characteristics of Computer Bus


A bus provides a system clock signal to synchronize the peripherals attached to it with the

rest of the system.

a)

Data Sharing

b)

Addressing

c)

Power

d)

Timing

26.

What is a component that routes data between a computer’s buses and enables all components to communicate with each other?

a)

Processor

b)

Motherboard

c)

Chipset

d)

Hard Drive

27.

Which part of the chipset controls the transfer of data between the processor and RAM?

a)

Southbridge

b)

Internal Bus

c)

Northbridge

d)

Expansion Bus

28.

Why is the Northbridge physically located near the processor?

a)

To minimize power consumption

b)

To reduce heat

c)

To control data transfer between processor and RAM

d)

To manage peripheral devices

29.

This allows the processor to communicate with the system’s central memory or the RAM.

a)

Internal Bus (Front-Side Bus or FSB)

b)

Northbridge

c)

Southbridge

d)

Expansion Bus

30.

Which part of the chipset handles communication between peripheral devices?

a)

Northbridge

b)

Front-Side Bus

c)

Southbridge

d)

Internal Bus

31.

What is another term for the Southbridge?

a)

Memory Hub

b)

Expansion Bus

c)

Input/Output Controller Hub (ICH)

d)

Peripheral Manager

32.

Which bus allows various motherboard components like USB or serial ports to communicate?

a)

Address Bus

b)

Expansion Bus

c)

Control Bus

d)

Data Bus

33.

Another term for Northbridge?

a)

Memory Controller

b)

Front-Side Bus or FSB

c)

Input/Output controller or expansion controller

d)

Input/Output Bus

34.

Another term for Internal Bus?

a)

Memory Controller

b)

Front-Side Bus or FSB

c)

Input/Output controller or expansion controller

d)

Input/Output Bus

35.

Another term for Expansion Bus?

a)

Memory Controller

b)

Front-Side Bus or FSB

c)

Input/Output controller or expansion controller

d)

Input/Output Bus

36.

Computer Bus Technologies --->>> Previously Used Technology


IBM introduced this bus for IBM PC using an 8088 microprocessor. This has an 8-bit data bus and 20 address lines at a clock speed of 8 MHz.

a)

Industry Standard Architecture (ISA)

b)

Video Electronics Standards Association (VESA)

c)

Accelerated Graphics Port (AGP)

d)

Peripheral Component Interconnect (PCI)

37.

Computer Bus Technologies --->>> Previously Used Technology


This bus is a standard interface between a computer and its expansion. As applications became more graphically intensive, ________ was introduced to maximize throughput of video graphics memory. This also provides fast data flow between stations and can transfer up to 132 Mbps.

a)

Industry Standard Architecture (ISA)

b)

Video Electronics Standards Association (VESA)

c)

Accelerated Graphics Port (AGP)

d)

Peripheral Component Interconnect (PCI)

38.

Computer Bus Technologies --->>> Previously Used Technology


This is connected to the CPU. This operates at the speed of the processor bus and implies that video information is sent quickly to the card for processing. The data transfer rate ranges from 264 Mbps to 528Mbps and 800 Mbps up to 1.5 Gbps. Identified by its brown color.

a)

Industry Standard Architecture (ISA)

b)

Video Electronics Standards Association (VESA)

c)

Accelerated Graphics Port (AGP)

d)

Peripheral Component Interconnect (PCI)

39.

Computer Bus Technologies --->>> Previously Used Technology


Intel Corporation developed this bus. This includes a 32 or 64-bit bus that runs at 33/66 MHz clock speed. It offers many advantages for connections to hubs, routers, and network interface cards (NIC). In particular, provides more bandwidth up to 1 Gigabit per second as needed by these hardware components.

a)

Industry Standard Architecture (ISA)

b)

Video Electronics Standards Association (VESA)

c)

Accelerated Graphics Port (AGP)

d)

Peripheral Component Interconnect (PCI)

40.

Computer Bus Technologies --->>> Currently Used Technology


It is a set of ANSI standard electronic interfaces that allows PCs to communicate faster with peripheral hardware (e. g., disk drives, tape drives, CD-ROM drives, printers, and scanners). It is more flexible than previous parallel data transfer interfaces.

a)

Small Computer Systems Interface (SCSI)

b)

Personal Computer Memory Card Industry Association (PCMCIA)

c)

Peripheral Component Interconnect Express (PCIe)

d)

Universal Serial Bus (USB)

41.

Computer Bus Technologies --->>> Currently Used Technology


This was founded to give a standard bus for laptop computers. This card has a 68-pin connector that connects into a slot in the PC. These cards are plug-and-play devices that are often hot-swappable in most of the operating systems.

a)

Small Computer Systems Interface (SCSI)

b)

Personal Computer Memory Card Industry Association (PCMCIA)

c)

Peripheral Component Interconnect Express (PCIe)

d)

Universal Serial Bus (USB)

42.

Computer Bus Technologies --->>> Currently Used Technology


It is an interface standard for connecting high-speed components. It comes in different physical configurations: x1, x4, x8, x16, x32. The number after the “x” implies the number of lanes (how data travels to) that it has.

a)

Small Computer Systems Interface (SCSI)

b)

Personal Computer Memory Card Industry Association (PCMCIA)

c)

Peripheral Component Interconnect Express (PCIe)

d)

Universal Serial Bus (USB)

43.

Computer Bus Technologies --->>> Currently Used Technology


It connects peripheral devices such as digital cameras, mice, keyboards, printers, scanners, media devices, external hard drives, and flash drives. It is intended to enhance plug-and-play and to allow hot-swapping.

a)

Small Computer Systems Interface (SCSI)

b)

Personal Computer Memory Card Industry Association (PCMCIA)

c)

Peripheral Component Interconnect Express (PCIe)

d)

Universal Serial Bus (USB)

44.

This allows user input from the outside world to the computer.

a)

Input Peripherals

b)

Output Peripherals

c)

Input-Output Peripherals

d)

Storage

45.

This allows information output from the computer to the outside world.

a)

Input Peripherals

b)

Output Peripherals

c)

Input-Output Peripherals

d)

Storage

46.

This allows information to be sent through input and output.

a)

Input Peripherals

b)

Output Peripherals

c)

Input-Output Peripherals

d)

Storage

47.

This allows the usage of I/O for storing and fetching of information.

a)

Input Peripherals

b)

Output Peripherals

c)

Input-Output Peripherals

d)

Storage

48.

I/O Characteristics

I/O devices are incredibly diverse with respect to the following:


Input, output, or storage purposes

a)

Behavior

b)

Partner

c)

Data Rate

d)

Control

49.

I/O Characteristics

I/O devices are incredibly diverse with respect to the following:


Input, output, or storage purposes

a)

Behavior

b)

Partner

c)

Data Rate

d)

Control

50.

I/O Characteristics

I/O devices are incredibly diverse with respect to the following:


Input, output, or storage purposes

a)

Behavior

b)

Partner

c)

Data Rate

d)

Control

51.

I/O Characteristics

I/O devices are incredibly diverse with respect to the following:


Input, output, or storage purposes

a)

Behavior

b)

Partner

c)

Data Rate

d)

Control

52.

I/O Characteristics

I/O devices are incredibly diverse with respect to the following:


Human or machine interaction

a)

Behavior

b)

Partner

c)

Data Rate

d)

Control

53.

I/O Characteristics

I/O devices are incredibly diverse with respect to the following:


The amount of data transferred to or from the I/O device in a period. It is typically measured in bits per second

a)

Behavior

b)

Partner

c)

Data Rate

d)

Control

54.

I/O Characteristics

I/O Considerations:


This refers to how fast the device is.

a)

Performance

b)

Expandability

c)

Dependability

d)

Cost

e)

Size and Weight

55.

I/O Characteristics

I/O Considerations:


This refers to the expansion of the I/O device.

a)

Performance

b)

Expandability

c)

Dependability

d)

Cost

e)

Size and Weight

56.

I/O Characteristics

I/O Considerations:


This refers to the capability of the range and control of an I/O device.

a)

Performance

b)

Expandability

c)

Dependability

d)

Cost

e)

Size and Weight

57.

I/O Characteristics

I/O Considerations:


This refers to the cost (how cheap or expensive) of an I/O module or device.

a)

Performance

b)

Expandability

c)

Dependability

d)

Cost

e)

Size and Weight

58.

I/O Characteristics

I/O Considerations:


These refer to the dimensions of an I/O device.

a)

Performance

b)

Expandability

c)

Dependability

d)

Cost

e)

Size and Weight

59.

I/O Performance


This is the amount of information that can be input (output) and communicated across an interconnect (say, for example, a bus) to the processor or memory (I/O device) per unit time.

a)

I/O Performance

b)

I/O Bandwitdth

c)

I/O Response Time

d)

I/O Data Transfer

60.

I/O Performance


This is the total elapsed time to accomplish by an input or output operation. This is also an especially important performance metric in real-time systems.

a)

I/O Performance

b)

I/O Bandwitdth

c)

I/O Response Time

d)

I/O Data Transfer

61.

I/O Performance


Also known as Throughput

a)

I/O Performance

b)

I/O Bandwitdth

c)

I/O Response Time

d)

I/O Data Transfer

62.

I/O Performance


Also known as Latency

a)

I/O Performance

b)

I/O Bandwitdth

c)

I/O Response Time

d)

I/O Data Transfer

63.

I/O Performance


Two questions in I/O Bandwidth

a)

How much data can be moved through the system at a certain time?

b)

How many I/O operations can be done per unit time?

c)

How much memory is installed in the system?

d)

How fast the processor can execute a single instruction?

64.

Modes of I/O Transfer


These instructions are the result of I/O instructions written in a computer program. The instruction in the program initiates each data item transfer. Usually, the program controls data transfer to and from the CPU and peripheral. Transferring data requires constant monitoring of the peripherals by the CPU.

a)

Programmed I/O

b)

Interrupt Initiated I/O

c)

Direct Memory Access (DMA)

d)

Performance I/O

65.

Modes of I/O Transfer --->>> Programmed I/O


For addressing the I/O device.

a)

Address Registers

b)

Data Registers

c)

Control Registers

d)

I/O Registers

66.

Modes of I/O Transfer --->>> Programmed I/O


For holding I/O data.

a)

Address Registers

b)

Data Registers

c)

Control Registers

d)

I/O Registers

67.

Modes of I/O Transfer


The interface determines when the peripheral is ready for data transfer, then it generates an interrupt. After receiving the interrupt signal, the CPU stops the task it processes and service the I/O transfer. Then, it returns to its previous processing task. It also require CPU immediate attention.

a)

Programmed I/O

b)

Interrupt Initiated I/O

c)

Direct Memory Access (DMA)

d)

Control I/O

68.

Modes of I/O Transfer


It is a technique of removing the CPU from the path and letting the peripheral device manage the memory buses directly to improve the speed of transfer. It manages the transfer of data between peripherals and memory unit. CPU initiates the transfer, does other operations while the transfer is in progress, and receives an interrupt when the transfer has been completed.

a)

Programmed I/O

b)

Interrupt Initiated I/O

c)

Direct Memory Access (DMA)

d)

Control I/O

69.

Modes of I/O Transfer --->>> Interrupt Initiated I/O --->>> Uses of Interrupts


This process periodically checks for external events (ex. checking keyboard input).

a)

As an external event notifier.

b)

As a completion signal.

c)

As a means of allocating CPU time.

d)

The interrupt as an abnormal event indicator.

e)

Software interrupts.

70.

Modes of I/O Transfer --->>> Interrupt Initiated I/O --->>> Uses of Interrupts


It can be a notifier when a process is complete.

a)

As an external event notifier.

b)

As a completion signal.

c)

As a means of allocating CPU time.

d)

The interrupt as an abnormal event indicator.

e)

Software interrupts.

71.

Modes of I/O Transfer --->>> Interrupt Initiated I/O --->>> Uses of Interrupts


The time between interrupt pulses is known as a quantum, which represents the time that each program or process will have allotted to it.

a)

As an external event notifier.

b)

As a completion signal.

c)

As a means of allocating CPU time.

d)

The interrupt as an abnormal event indicator.

e)

Software interrupts.

72.

Modes of I/O Transfer --->>> Interrupt Initiated I/O --->>> Uses of Interrupts


It uses traps or exceptions to avoid errors or illegal instructions.

a)

As an external event notifier.

b)

As a completion signal.

c)

As a means of allocating CPU time.

d)

The interrupt as an abnormal event indicator.

e)

Software interrupts.

73.

Modes of I/O Transfer --->>> Interrupt Initiated I/O --->>> Uses of Interrupts


Programs or applications with higher priority and privileges (depending on the user’s and system’s grant) can request a special interrupt if prompted.

a)

As an external event notifier.

b)

As a completion signal.

c)

As a means of allocating CPU time.

d)

The interrupt as an abnormal event indicator.

e)

Software interrupts.

74.

Modes of I/O Transfer --->>> Direct Memory Access --->>> Main Conditions


The following are the Main Conditions of DMA EXCEPT

a)

Method to connect the I/O module and the memory

b)

The I/O module must be able to read from and write to the memory

c)

As a means of allocating CPU time.

d)

Method to avoid conflict between the CPU and the I/O module writing to memory at the same

time.

75.

Modes of I/O Transfer --->>> Direct Memory Access --->>> Methods of Execution


The two (2) methods of execution.

a)

Buffer Chaining

b)

Operation Chaning

c)

Control Chaining

d)

Address Chaining

76.

Modes of I/O Transfer --->>> Direct Memory Access --->>> Methods of Execution


The following are characteristics of Buffer Chaining EXCEPT

a)

It handles multiple transfers without the processor.

b)

The device gives a linked list of buffers.

c)

The device hardware uses the next buffer on the list automatically.

d)

The device carries out successive commands automatically

77.

Modes of I/O Transfer --->>> Direct Memory Access --->>> Methods of Execution


The following are characteristics of Operation Chaining EXCEPT

a)

The processor gives a series of commands to the device, sometimes called a channel

program.

b)

Further optimization for smart device

c)

The device hardware uses the next buffer on the list automatically.

d)

The device carries out successive commands automatically

78.

I/O Controller --->>> Functions


It includes the connection, voltage supply, protocol enactor, clocking.

a)

Interface translation

b)

Addressing

c)

Multiplexing

d)

Buffering

e)

Error detection and correction

79.

I/O Controller --->>> Functions


It is able to process memory locations or addresses for the function of processing.

a)

Interface translation

b)

Addressing

c)

Multiplexing

d)

Buffering

e)

Error detection and correction

80.

I/O Controller --->>> Functions


It can combine multiple signals over the bus to reduce multiple bus usage.

a)

Control of Multiple Steps

b)

Addressing

c)

Multiplexing

d)

Buffering

e)

Error detection and correction

81.

I/O Controller --->>> Functions


It gives data transfer a boost by preloading data into memory before processing.

a)

Control of Multiple Steps

b)

Addressing

c)

Multiplexing

d)

Buffering

e)

Error detection and correction

82.

I/O Controller --->>> Functions


It can detect errors and correction.

a)

Control of Multiple Steps

b)

Addressing

c)

Multiplexing

d)

Buffering

e)

Error detection and correction

83.

I/O Controller --->>> Functions


This reduces CPU workload due to I/O controller being the one that processes I/O instructions.

a)

Control of Multiple Steps

b)

Addressing

c)

Multiplexing

d)

Buffering

e)

Error detection and correction

84.

Serves as an intermediary interface between the CPU and a specific device that accepts commands from the CPU and controls the exact device after.

a)

I/O Controller

b)

I/O Data Transfer

c)

I/O Performance

d)

I/O Characteristics

85.

Serve as direct interfaces between a general system bus and each of the system’s peripheral devices. In

general, It simplify the task of interfacing peripheral devices to a CPU.

a)

I/O Controller

b)

I/O Data Transfer

c)

I/O Performance

d)

I/O Characteristics

86.

They support DMA so the CPU may be free to perform other tasks.

a)

I/O Controller

b)

I/O Data Transfer

c)

I/O Performance

d)

I/O Characteristics

87.

Allows the processing of each instruction to progress in parallel.

a)

I/O Controller

b)

I/O Data Transfer

c)

I/O Performance

d)

I/O Characteristics

88.

A small piece of software that tells the operating system and other software how to communicate with a piece of hardware.

a)

I/O Controller

b)

I/O Data Transfer

c)

I/O Performance

d)

Device Driver

89.

Provide the specialized circuitry required to interface different types of peripherals to the computer.

a)

Device Controllers

b)

Buffer Chaining

c)

Operation Chaining

d)

Data Rate

90.

Which of the following statements about Parallel Bus are correct?


  • Statement 1: Parallel bus transmits several streams of data simultaneously along multiple channels.

  • Statement 2: Parallel bus is used mainly for long-distance communication.

  • Statement 3: Parallel bus operates in half-duplex mode — data is either sent or received.

  • Statement 4: Parallel bus requires fewer interconnecting cables and occupies less space.

a)

Statements 1 and 3 only

b)

Statements 1, 2, and 3

c)

Statements 2 and 4 only

d)

Statements 1, 3, and 4

91.

Which of the following statements about Serial Bus are correct?


  • Statement 1: Serial bus can transmit fewer data in faster clock cycles to achieve a higher data rate.

  • Statement 2: Serial bus is half-duplex — sender can either send or receive but not both.

  • Statement 3: Serial bus requires fewer interconnecting cables and occupies less space.

  • Statement 4: Serial bus is used for long-distance communication.

a)

Statements 1, 2, and 3 only

b)

Statements 1, 3, and 4 only

c)

Statements 2 and 3 only

d)

Statements 1 and 4 only

92.

What is the process called where multiple requests are recognized and priority is given to one of them?

a)

Multiplexing

b)

Arbitration

c)

Serialization

d)

Priority

93.

Which of the following statements about Centralized Arbitration are correct?


  • Statement 1: In centralized arbitration, an arbitration circuit receives requests from the contending bus masters and then decides which of them is to be given control of the bus.

  • Statement 2: A single hardware device, known as a bus controller or arbiter, is responsible for allocating time to bus.

  • Statement 3: The device may be part of the CPU or a separate module such as daisy-chaining.

  • Statement 4: Each module may claim the bus independently.

a)

Statements 1, 2, and 3 only

b)

Statements 1 and 2 only

c)

Statements 1, 2, and 4 only

d)

All statements are correct

94.

Which of the following statements about Distributed Arbitration are correct?


  • Statement 1: There is no central controller. Each module may claim the bus.

  • Statement 2: All devices monitor all the request lines.

  • Statement 3: In a system with distributed arbitration, each of the masters takes part in the arbitration process.

  • Statement 4: The system lacks a specific arbiter—each master monitors the other masters and decides whether to continue competing for the bus or give up and wait until later.

a)
  • Statements 1 and 2 only

b)
  • Statements 1, 2, and 4 only

c)
  • Statements 1, 2, 3, and 4

d)
  • Statements 2, 3, and 4 only