WorksheetsMicrocontroller Quiz
Total questions: 40
Worksheet time: 33mins
The CPU of an 8-bit microcontroller can process how many bits at a time?
4 bits
8 bits
16 bits
32 bits
Which of the following is a popular 8-bit microcontroller?
ARM Cortex-M4
MSP430
8051
PIC24
A typical 8-bit microcontroller has an address bus of:
8 bits
16 bits
20 bits
32 bits
Which microcontroller family belongs to 16-bit architecture?
PIC16 series
Atmel ATmega series
MSP430
Intel 8051
16-bit microcontrollers can directly handle:
Only 8-bit data
16-bit data
Both 8-bit and 16-bit data
Only 32-bit data
Which of the following is an advantage of 8-bit microcontrollers?
High memory range
Low cost and low power
Faster arithmetic operations
Large addressing capability
Which application is better suited for 16-bit microcontrollers?
Toys
Washing machines
Industrial control systems
Simple remote controls
The maximum memory addressable by a 16-bit address bus is:
256 bytes
1 KB
64 KB
1 MB
Which is true about 16-bit microcontrollers compared to 8-bit?
Slower but cheaper
Faster with larger memory support
Smaller instruction size
Always lower power consumption
Example of a 16-bit PIC microcontroller series is:
PIC16
PIC18
PIC24
PIC32
The 8051 microcontroller is an 8-bit device.
True
False
16-bit microcontrollers cannot perform 8-bit operations.
True
False
8-bit microcontrollers usually have limited memory (≤ 64 KB).
True
False
16-bit microcontrollers are generally more expensive than 8-bit ones.
True
False
Both 8-bit and 16-bit microcontrollers integrate CPU, memory, and peripherals.
True
False
The classic ARM pipeline consists of how many stages?
2
3
5
7
In ARM, a data hazard occurs when:
Instruction depends on the result of a previous instruction
Two instructions access the same memory simultaneously
A branch changes the flow of instructions
The cache misses occur frequently
ARM uses branch prediction to reduce:
Data hazards
Control hazards
Structural hazards
Memory stalls
Which ARM feature helps minimize pipeline stalls by executing conditional instructions?
CPSR flags
Thumb mode
Predicated execution (conditional execution)
Barrel shifter
In ARM, inserting NOPs in the instruction stream is a technique to handle:
Cache misses
Pipeline hazards
Interrupt latency
Register overflow
ARM7 uses a simple 3-stage pipeline.
True
False
Data forwarding is not supported in ARM processors.
True
False
Control hazards in ARM occur mainly due to branch instructions.
True
False
Superscalar ARM cores (like Cortex-A series) can issue multiple instructions per cycle.
True
False
In ARM, structural hazards are eliminated by providing separate instruction and data memory paths (Harvard architecture).
True
False
What are the three basic pipeline stages in ARM7?
Name the three types of pipeline hazards in ARM.
How does ARM's conditional execution help reduce branch hazards?
What is a branch penalty in ARM?
Mention one feature of ARM Cortex-M processors that improves pipeline efficiency.
In ARM, cache memory is used to:
Increase program size
Reduce instruction execution time
Provide virtual addresses
Manage interrupts
ARM processors generally support which type of cache?
Only instruction cache
Only data cache
Both instruction and data caches
No cache
The Memory Management Unit (MMU) in ARM is responsible for:
Converting virtual addresses to physical addresses
Handling interrupts
Instruction pipelining
Cache replacement policy
ARM uses page tables in virtual memory for:
Branch prediction
Address translation
Cache mapping
Instruction pipelining
The ARM TLB (Translation Lookaside Buffer) stores:
Recently used instructions
Recently used address translations
Recently used cache lines
Recently used flags
ARM supports both write-through and write-back cache policies.
True
False
In ARM, MMU must always be enabled to run any program.
True
False
Virtual memory in ARM allows execution of programs larger than physical memory.
True
False
ARM Cortex-M series usually does not include an MMU but may include an MPU (Memory Protection Unit).
True
False
Cache misses in ARM always lead to pipeline flush.
True
False
