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WorksheetsPrerequisite Test: Fundamentals and Architectures
Total questions: 38
Worksheet time: 19mins
What is computer architecture?
set of principles and methods that specify the functioning, organisation, and implementation of computer systems
set of functions and methods that specify the functioning, organisation, and implementation of computer systems
set of categories and methods that specify the functioning, organisation, and implementation of computer systems
None of the mentioned
What is computer organization?
structure and behaviour of a computer system as observed by the developer
structure and behaviour of a computer system as observed by the user
structure of a computer system as observed by the developer
All of the mentioned
Which of the following is a type of computer architecture?
All of the mentioned
Harvard Architecture
Microarchitecture
Von-Neumann Architecture
Which of the following is a type of architecture used in the computers nowadays?
Microarchitecture
Harvard Architecture
Von-Neumann Architecture
System Design
Which of the following is the subcategories of computer architecture?
Microarchitecture
Instruction set architecture
Systems design
All of the mentioned
Which of the architecture is power efficient?
RISC
ISA
IANA
CISC
What does CSA stands for?
Carry Save Addition
None of the mentioned
Computer Speed Addition
Computer Service Architecture
If an exception is raised and the succeeding instructions are executed completely, then the processor is said to have ______
Exception handling
Imprecise exceptions
Generation word
None of the mentioned
To reduce the memory access time we generally make use of ______
Higher capacity RAM’s
SDRAM’s
Cache’s
Heaps
The IA-32 system follows which of the following design?
RISC
SIMD
None of the mentioned
CISC
Which of the following architecture is suitable for a wide range of data types?
IA-32
ARM
68000
ASUS firebird
In IA-32 architecture along with the general flags, which of the following conditional flags are provided?
All of the mentioned
IOPL
IF
TF
The VLIW architecture follows _____ approach to achieve parallelism.
MISD
SIMD
SISD
MIMD
What does VLIW stands for?
Very Long Instruction Width
Very Long Instruction Word
Very Long Instruction Width
Very Large Instruction Word
In CISC architecture most of the complex instructions are stored in _____
CMOS
Register
Transistors
Diodes
Both the CISC and RISC architectures have been developed to reduce the ______
All of the mentioned
Cost
Semantic gap
Time delay
________ are the different type/s of generating control signals.
Micro-programmed
Micro-instruction
Hardwired
Both Micro-programmed and Hardwired
If the instruction Add R1, R2, R3 is executed in a system which is pipelined, then the value of S is (Where S is term of the Basic performance equation).
~1
2
2
~7
The small extremely fast, RAM’s all called as ________
Cache
Stacks
Accumulators
Heaps
For a given FINITE number of instructions to be executed, which architecture of the processor provides for a faster execution?
All of the mentioned
ANSA
Super-scalar
ISA
What is the full form of ISA?
International Standard Architecture
Industry Standard Architecture
International American Standard
None of the mentioned
Which of the following is the fullform of CISC?
Complex Instruction Sequential Compilation
Complex Instruction Set Computer
Computer Integrated Sequential Compiler
Complete Instruction Sequential Compilation
The reason for the cells to lose their state over time is ________
Use of Shift registers
The lower voltage levels
Usage of capacitors to store the charge
None of the mentioned
In order to read multiple bytes of a row at the same time, we make use of ______
Memory extension
Cache
Shift register
Latch
The difference in the address and data connection between DRAM’s and SDRAM’s is ________
The requirement of more address lines in SDRAM’s
The usage of a buffer in SDRAM’s
None of the mentioned
The usage of more number of pins in SDRAM’s
The chip can be disabled or cut off from an external connection using ______
LOCK
ACPT
Chip select
RESET
The controller multiplexes the addresses after getting the _____ signal.
RESET
Request
ACK
INTR
The data is transferred over the RAMBUS as ________
Blocks
Swing voltages
Bits
Packets
The memory devices which are similar to EEPROM but differ in the cost effectiveness is ______
CMOS
Blue-ray devices
Memory sticks
Flash memory
The flash memory modules designed to replace the functioning of a hard disk is ______
DIMM
Flash drives
FIMM
RIMM
The drawback of building a large memory with DRAM is ______________
Complex write algorithms
Limited endurance cycles
High power consumption
The Slow speed of operation
In a 4K-bit chip organization with 19 external connections, how many address lines are there if 8 data lines are present?
8 address lines total
9 address lines total
12 address lines total
10 address lines total
What does ISO stand for in computing standards?
International Software Organisation
Industrial Software Organisation
International Standards Organisation
Industrial Standards Organisation
Which bit indicates that a cache location has been updated and holds modified data?
Update bit indicates update
Dirty bit indicates update
Reference bit indicates update
Flag bit indicates update
During a write operation, if the required block is absent from cache, which condition occurs?
Write miss occurs
Write delay occurs
Write latency occurs
Write hit occurs
In a 16-bit system using direct mapping, the higher-order 5 bits are used for what field?
Tag field selection
Block field selection
Word field selection
Id field selection
Which bit indicates whether a cache block was recently used?
Control bit indicates recent use
Dirty bit indicates recent use
Reference bit indicates recent use
Idle bit indicates recent use
The fraction of successful memory accesses is called what metric?
Miss rate metric
Hit rate metric
Success rate metric
Access rate metric
