

H446.1.1.2.types of processor
Presentation
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Computers
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12th Grade
•
Easy
Ian Currie
Used 7+ times
FREE Resource
28 Slides • 51 Questions
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by Mr. Shingari
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Describe von Neumann, Harvard and contemporary processor architecture
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You understand the concept of stored program.
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Fill in the Blanks
Stored program concept: A program must be loaded into ---- memory to be executed by the processor
Type answer...
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Fill in the Blanks
Stored program concept: The ------------ are fetched one at a time, decoded and executed sequentially by the processor
Type answer...
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Fill in the Blanks
Stored program concept: The sequence of instructions can only be changed by a conditional or unconditional ---- instruction
Type answer...
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​
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Open Ended
What compromises would there be with a shared bus?
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You understand the von Neumann and harward architectures
You can explain the differences between these two architectures.
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Multiple Choice
Used in PCs, laptops, servers and high performance computers
Von Neuman architecture
Harward architecture
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Used in digital signal processing, microcontrollers and in embedded systems such as microwave ovens and watches
Von Neuman architecture
Harward architecture
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Data and instructions share the same memory. Both use the same word length
Von Neuman architecture
Harward architecture
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Multiple Choice
Instructions and data are held in separate memories which may have different word lengths. Free data memory can’t be used for instructions, and vice versa
Von Neuman architecture
Harward architecture
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Multiple Choice
Separate buses allow parallel access to data and instructions
Von Neuman architecture
Harward architecture
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Multiple Choice
One bus is simpler for control unit design
Von Neuman architecture
Harward architecture
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Control unit for two buses is more complicated and expensive
Von Neuman architecture
Harward architecture
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Open Ended
How would the multiplication operation be carried out with the following operations?
CISC instruction MULT A, B
LDA (LOAD) STO (STORE) MULT (MULTIPLY)
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You can list advantages of both of these architectures.
You can list disadvantages of both of these architectures.
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Multiple Choice
Quicker to code programs
CISC
RISC
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The compiler has very little work to do to translate a high-level language statement into machine code
CISC
RISC
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The hardware is simpler to build with fewer circuits needed for carrying out complex instructions
CISC
RISC
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Because each instruction takes the same amount of time, i.e. one clock cycle, pipelining is possible
CISC
RISC
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Because the code is relatively short, very little RAM is required to store the instructions
CISC
RISC
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Open Ended
(a) Name another architecture that resolves this issue. How does it differ from von Neumann architecture?
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(a) Name another architecture that resolves this issue. How does it differ from von Neumann architecture?
Harvard architecture
this has separate memories for instructions and data.
Separate data buses transfer instructions and data to and from memory
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Avoids data erroneously overwriting programming instructions in the same address location;
Von Neuma Architecture
Harvard Architectur
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you can use free memory for data/instructions
Von Neuma Architecture
Harvard Architectur
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Data cannot be executed as code;
Von Neuma Architecture
Harvard Architectur
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Data and instructions can have different word lengths;
Von Neuma Architecture
Harvard Architectur
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Fill in the Blanks
CISC stands for
Type answer...
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In this technology, the instruction set consists of a large number of instructions, each designed to execute a series of sub-tasks that make up a single instruction.
RISC
CISC
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Very little RAM is needed to store the instructions
RISC
CISC
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uses a small instruction set, and each instruction can be performed in one clock cycle.
RISC
CISC
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pipelining is possible
RISC
CISC
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You can list advantages of both of these architectures.
You can list disadvantages of both of these architectures.
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Open Ended
Compare co-processor and parallel processor systems. (Note that “compare” means describe similarities and differences.)
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Multiple Choice
More than one processor working together to perform a single job
co-processor
Parallel processor
both
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processors can use any processor for a task
co-processor
Parallel processor
both
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Job is split into tasks / in a multicore system, different processors may work on different tasks
co-processor
Parallel processor
both
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Processors are controlled by a single operating system
co-processor
Parallel processor
both
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These processors need a more complex operating system / harder to program
co-processor
Parallel processor
both
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Multiple Choice
These processors are synchronised
co-processor
Parallel processor
both
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