ADC

In analog to digital converter (ADCs) sample - and - hold circuits are designed to

• Sample and hold the output of the binary counter during the conversion process

• stabilize the comparator threshold voltage during the comparison process

• stabilize the input analog signal during the conversion process

• sample and hold the D/A converter staircase waveform during the conversion process

Which term applies to the maintaining of a given signal level until the next sampling

• Holding

• Aliasing

• shannon frequency sampling

• stair-stepping

What is the Purpose of Sample and Hold Circuit?

• To keep temporary memory

• To hold a voltage constant so an ADC has time to produce an output

• To hold a voltage constant so a DAC has time to produce an output

• To hold data after multiplexer has selected an output

Identifyfrom the following performance parameter of ADC in which suits the definition of no. of samples per second.

• Aliasing

• Quantization Error

• Resolution

• Sampling Frequency

The quantization process

• converts the sample-and-hold output to binary code

• converts a sample impulse to a level

• converts a sequence of binary codes to a reconstructed analog signal

• filters out unwanted frequencies before sampling takes place

Aliasing results in

• oversampling

• undersampling

• guard-band formation

• perfect sampling