Quiz 2 COA

Which of the following is not a type of cache memory commonly found in modern computer systems?

• L1 Cache

• RAM Cache

• L2 Cache

• L3 Cache

What is the primary purpose of cache memory in a computer system?

• Storing data for long-term storage

• Speeding up data access by providing fast, temporary storage

• Managing virtual memory

• Allocating memory for new processes

What is the term for the process of moving data between RAM and virtual memory storage on a regular basis to manage memory usage efficiently?

• Fragmentation

• Paging

• Swapping

• Caching

Which memory management scheme uses fixed-size partitions and can lead to memory fragmentation?

• Segmentation

• Paging

• Virtual memory

• Cache memory

Which component of a memory management unit is responsible for converting virtual addresses to physical addresses?

• Cache controller

• Memory segmentation unit

• Memory mapping unit

• Page table

Which of the following memory management techniques allows processes to have memory spaces larger than physical RAM?

• Segmentation

• Paging

• Cache memory

• Virtual memory

Which I/O access method involves a program polling the I/O device's status bit until it becomes ready?

• Interrupt-driven I/O

• Programmed I/O

• Direct Memory Access (DMA)

• Cycle Stealing

What is the purpose of bus arbitration in a computer system?

• To allocate CPU time to different processes

• To resolve conflicts when multiple devices want to use the system bus simultaneously

• To manage virtual memory

• To control memory access for cache management

What is the primary role of Direct Memory Access (DMA) in a computer system?

• It controls the CPU's operation.

• It manages the file system.

• It enables I/O devices to transfer data directly to and from memory without involving the CPU.

• It handles virtual memory paging.

What is a TLB (Translation Lookaside Buffer) used for in memory management?

• Storing frequently accessed data in cache memory

• Translating virtual addresses to physical addresses more efficiently

• Managing segmentation of memory

• Determining the size of memory pages