Structure / Function Processor 2

Structure / Function Processor 2

11th - 12th Grade

20 Qs

quiz-placeholder

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Structure / Function Processor 2

Structure / Function Processor 2

Assessment

Quiz

Computers

11th - 12th Grade

Easy

Created by

damian hall

Used 20+ times

FREE Resource

20 questions

Show all answers

1.

MULTIPLE SELECT QUESTION

45 sec • 1 pt

Give an example of pipelining

Client computers send multiple requests to a web server. Responses must be returned in the same sequence that the requests were received.

When a printer has to deal with multiple print jobs. They have to be stored in memory sequentially (in a priority queue) and they printed one by one.

One instruction is being fetched, the previous instruction is being decoded and the first instruction is being executed.


One instruction is being decoded, the previous instruction is being decoded and the first instruction is being fetched.

2.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

Stores the address of the memory location from which data or an instruction is fetched or stored.

MAR (Memory Address Register)


  • MDR (Memory Data Register)


  • Program Counter

Accumulator

CIR (Current Instruction Register)

3.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

Stores the data or instruction read from or written to RAM.

MAR (Memory Address Register)


  • MDR (Memory Data Register)


  • Program Counter

Accumulator

CIR (Current Instruction Register)

4.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

Stores the address of the next instruction to be fetched.

MAR (Memory Address Register)


  • MDR (Memory Data Register)


  • Program Counter

Accumulator

CIR (Current Instruction Register)

5.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

Stores the result of a calculation.

MAR (Memory Address Register)


  • MDR (Memory Data Register)


  • Program Counter

Accumulator

CIR (Current Instruction Register)

6.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

Holds the instruction that is currently being decoded and executed.

MAR (Memory Address Register)


  • MDR (Memory Data Register)


  • Program Counter

Accumulator

CIR (Current Instruction Register)

7.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

Has a single Data Bus that transmits both data and instructions

Von Neumann Architecture

Contemporary (Harvard) Architecture

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