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WorksheetsUNIT-9
Total questions: 23
Worksheet time: 14mins
Name
Class
Date
1.
A DAC is a
a)
digital-to-analog computer
b)
digital analysis calculator
c)
data accumulation converter
d)
digital-to-analog converter
2.
A type of Error associated with digital to analog converters (DACs) is:
a)
nonmonotonic error
b)
incorrect output codes
c)
offset error
d)
nonmonotic and offset error
3.
In troubleshooting a DAC, we check its performance characteristics, such as______________
a)
nonmonotonicity
b)
differential nonlinearity
c)
low and high gain
d)
all of the above
4.
What is gain error in a DAC
a)
missing codes
b)
error in the slope of the output staircase waveform
c)
more or less input voltage is required for the first step than what is specified
d)
None
5.
A Binary weighted digital to analog converter has an input resistor of 100kΩ. What will be current through the resistor, if the resistor is connected to a 5V Source?
a)
50μA
b)
5mA
c)
500μA
d)
50mA
6.
In a binary weighted DAC, the lowest-value resistor corresponds to
a)
the highest binary weighted input
b)
the lowest binary weighted input
c)
the first input
d)
the last input
7.
As Compared to binary weighted digital to analog DAC converter , the major advantage of the R/2R ladder digital to analog (DAC) is
a)
It only uses two different resistor values
b)
it has a fewer part of the same number of inputs
c)
Its Operation is much easier to analyse
d)
The Virtual Ground is elimated and the circuit is therefore easier to understand and troubleshoot
8.
Which term applies to the maintaining of a given signal level until the next sampling
a)
Holding
b)
Aliasing
c)
shannon frequency sampling
d)
stair-stepping
9.
In analog to digital converter (ADCs) sample - and - hold circuits are designed to
a)
Sample and hold the output of the binary counter during the conversion process
b)
stabilize the comparator threshold voltage during the comparison process
c)
stabilize the input analog signal during the conversion process
d)
sample and hold the D/A converter staircase waveform during the conversion process
10.
What is the Purpose of Sample and Hold Circuit?
a)
To keep temporary memory
b)
Tp hold a voltage constant so an ADC has time to produce an output
c)
To hold a voltage constant so a DAC has time to produce an output
d)
To hold data after multiplexer has selected an output
11.
The most common ADC seen in telecommunications based on audio signals is
a)
flash ADC
b)
successive approximation ADC
c)
sigma-delta ADC
d)
dual slope ADC
12.
Identify from the following performance parameter of ADC in which suits the definition of no. of samples per second.
a)
Aliasing
b)
Quantization Error
c)
Resolution
d)
Sampling Frequency
13.
The quantization process
a)
converts the sample-and-hold output to binary code
b)
converts a sample impulse to a level
c)
converts a sequence of binary codes to a reconstructed analog signal
d)
filters out unwanted frequencies before sampling takes place
14.
Aliasing results in
a)
oversampling
b)
undersampling
c)
guard-band formation
d)
perfect sampling
15.
The dual slope analog to digital conver finds extensive use in _____
a)
digital voltmeter
b)
function generators
c)
frequency counters
d)
all of the above
16.
A digital voltmeter uses a
a)
flash ADC
b)
successive approximation ADC
c)
sigma-delta ADC
d)
dual-slope ADC
17.
What is the Primary disadvantage of the Flash analog to digital converter (ADC)?
a)
It requires the input voltage to be applied to the inputs simultaneously
b)
a long conversion time is required
c)
a large number of output lines is required to simultaneously decode the input voltage
d)
a large number of comparators is required to represent a resonable sized binary number
18.
What is the Conversion time of flash converter?
a)
20s
b)
10s
c)
1s
d)
The Conversion takes place continuously
19.
In a flash Analog to Digital convertor,the output of each comparator is connected to an input of a ______________
a)
decoder
b)
priority encoder
c)
multiplexer
d)
demultiplexer
20.
The throughput of a flash ADC is measured in
a)
displacement per second
b)
distance per second
c)
samples per minute
d)
samples per second
21.
The main advantage of the successive - approximation A/D converter over the counter - ramp A/D converter is its:
a)
more complec circuitry
b)
less complex circuitry
c)
longer conversion time
d)
shorter conversion time
22.
The ADC0808 is an example of a _____________
a)
Single -slope analog to digital converter
b)
dual slope analog to digital converter
c)
digital ramp analog to digital converter
d)
successive approximation analog to digital converter
23.
Assume that a particular IC has a supply voltage (Vcc) equal to +5 V and ICCH = 10 mA and ICCL = 23 mA. What is the power dissipation for the chip?
a)
50 mW
b)
82.5 mW
c)
115 mW
d)
165 mW
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