Free Printable POP TEST 2

1.

For the AND Boolean operation, the output is only true if _____

a)

one input is true

b)

one input is false

c)

both inputs are true

d)

both inputs are false

2.

Which of the following two input logic functions can act as a Universal gate?

a)

A ⊕ B

b)

AB

c)

(A+B)’

d)

None of the above

3.

In the Boolean algebra, a variable has ________ different state(s)/value(s).

a)

1

b)

2

c)

3

d)

4

4.

In Boolean algebra A.A.A.A is equal to

a)

1

b)

A⁴

c)

4A

d)

A

5.

In Boolean algebra AND is represented by

a)

/

b)

-

c)

×

d)

+

6.

X + XY = ?

a)

X+ Y

b)

X

c)

Y

d)

None

7.

( A + D ) ( A + C) = ?

a)

A + DC + AD

b)

A + DC

c)

DC

d)

none

8.

Boolean algebra can be used to

a)

simplify any algebraic expression

b)

Minimize number of switches in a circuit

c)

Solve the mathematical problem

d)

perform arithmetic calculation

9.

An inverter gates can be developed using

a)

two diodes

b)

A resistance and capacitance

c)

A transistor

d)

An inductance and capacitor

10.

NAND gate means

a)

Inversion followed by AND gates

b)

AND gates followed by an inverter

c)

AND gate followed by an OR Gate

d)

None

11.

In Boolean Algebra A + A + A + A =?

a)

A

b)

4A

c)

2A

d)

None

12.

In Boolean Algebra A plus A complement is equal to

a)

A

b)

0

c)

1

d)

None

13.

In Boolean Algebra A + 1 =?

a)

0

b)

1

c)

A

d)

None

14.

The result of A complement plus 1 is equal to

a)

A

b)

A complement

c)

1

d)

0

15.

Which law of Boolean algebra emphasizes the elimination of brackets from logical expression along with the re-arrangement of grouping variables ?

a)

Distributive Law

b)

Commutative Law

c)

Associative Law

d)

None

16.

A variable is a symbol in Boolean algebra used to represent

a)

data

b)

a condition

c)

an action

d)

answers (a),(b) and (c)

17.

According to the associative law of addition,

a)

A + B = B + A

b)

A = A + A

c)

(A + B) + C = A + (B + C )

d)

A + 0 = A

18.

How many EXOR gates and AND gates are required to design a half adder sum circuit?

a)

2 and 1 respectively

b)

3 and 2 respectively

c)

1 and 1 respectively

d)

1 and 2 respectively

19.

How many EXOR gates are required for FULL adder circuit?

a)

1

b)

2

c)

3

d)

4

20.

If the inputs to a full adder are A=1, B=0, C_IN=1 what will be the logic states on the outputs S and C_OUT?

a)

S = 0, C_OUT= 0

b)

S = 0, C_OUT= 1

c)

S = 1, C_OUT= 0

d)

S = 1, C_OUT= 1

21.

Combinational circuit has

a)

memory and depend only on the present input.

b)

no memory and depend only on the present input.

c)

no memory and depends on past and future inputs.

d)

memory and does not depend on present input.

22.

How many EXOR gates are required to design a FULL subtractor?

a)

1

b)

2

c)

3

d)

4

23.

The simplest equation which implements the K-map shown below is:

a)

X = AC + B

b)

X= AB'

c)

X=ABC'+ABC+AB'C

d)

X=AB+A'B

24.

Which of the following logic expressions represents the logic diagram shown?

a)

X=AB'+A'B

b)

X=(AB)'+AB

c)

X=(AB)'+A'B'

d)

X=A'B'+AB

25.

The implementation of simplified sum-of-products expressions may be easily implemented into actual logic circuits using all universal ________ gates with little or no increase in circuit complexity. (Select the response for the blank space that will BEST make the statement true.)

a)

AND

b)

NAND

c)

NOR

d)

OR/AND

26.

Which of the following statements accurately represents the two BEST methods of logic circuit simplification?

a)

Boolean algebra and Karnaugh mapping

b)

Karnaugh mapping and circuit waveform analysis

c)

Actual circuit trial and error evaluation and waveform analysis

d)

Boolean algebra and actual circuit trial and error evaluation

27.

Which of the following combinations cannot be combined into K-map groups?

a)

Corners in the same row

b)

Corners in the same column

c)

Diagonal corners

d)

Overlapping combinations

28.

Which statement below best describes a Karnaugh map?

a)

It is simply a rearranged truth table

b)

The Karnaugh map eliminates the need for using NAND and NOR gates

c)

Variable complements can be eliminated by using Karnaugh maps

d)

A Karnaugh map can be used to replace Boolean rules

29.

What is the minterm notation for A'BC

a)

M4

b)

m3

c)

M3

d)

m4

30.

What is the maxterm notation for A'+B'+C'

a)

M4

b)

m7

c)

M7

d)

m4

31.

Identify the SUM-TERM from the given Maxterm notation M6

a)

A+B+C

b)

A'+B+C'

c)

A+B'+C'

d)

A'+B'+C

32.

Identify the PRODUCT-TERM from the given Minterm notation m13

a)

A+B+C

b)

A'+B+C'

c)

A+B'+C'

d)

A'+B'+C

33.

Which of the following Code Sequence is used in cell numbering in K-map

a)

BCD Code

b)

Excess-3 Code

c)

Gray Code

d)

ASCII Code

34.

How many no. of cells are drawn for a 3-variables K-map?

a)

2

b)

4

c)

6

d)

8

35.

How many no. of cells are drawn for a 4-variables K-map?

a)

2

b)

4

c)

8

d)

16

36.

Quad in SoP based K-map means

a)

Grouping of two adjacent 1s

b)

Grouping of four adjacent 1s

c)

Grouping of two adjacent 0s

d)

Grouping of four adjacent 0s

37.

Octet in SoP based K-map means

a)

Grouping of two adjacent 1s

b)

Grouping of 8 adjacent 1s

c)

Grouping of two adjacent 0s

d)

Grouping of 8 adjacent 0s

38.

Pair in PoS based K-map means

a)

Grouping of two adjacent 1s

b)

Grouping of 8 adjacent 1s

c)

Grouping of two adjacent 0s

d)

Grouping of 8 adjacent 0s

39.

Octet in PoS based K-map means

a)

Grouping of two adjacent 1s

b)

Grouping of 8 adjacent 1s

c)

Grouping of two adjacent 0s

d)

Grouping of 8 adjacent 0s

40.

How many number of variable are ELIMINATED if a Octet is formed in a 4-variables K-map?

a)

1 variable

b)

2 variables

c)

3 variables

d)

4 variable

41.

A Karnaugh map is used for

a)

Minimising Boolean expressions

b)

Develop digital circuits

c)

Computer interface

d)

None of these

42.

A four variables Karnaugh map contains

a)

4 cells

b)

8cells

c)

16 cells

d)

32 cells

43.

A five variables Karnaugh map contains

a)

4 cells

b)

8 cells

c)

16 cells

d)

32 cells

44.

Quine McCluskey method uses

a)

Karnaugh map

b)

Tabular method

c)

Boolean algebra

d)

Graphical Method

45.

AND-OR realisation is equivalent to

a)

SOP

b)

POS

c)

K-MAP

d)

Boolean function

46.

The minimisation of logic expression is done due to

a)

Reduce space

b)

Reduce number of gates

c)

Reduce cost

d)

All of these

47.

How many AND gates are required to realize Y = CD+EF+G

a)

4

b)

3

c)

2

d)

1

48.

A combinational circuit has 3 inputs A, B, C and output F. F is true for following input combinations,

(i) A is False, B is True

(ii) A is False, C is True

(iii) A, B, C are False

(iv) A, B, C are True

Find the simplified expression for F in SOP form.

a)

F = A+BC

b)

F = A’+B'C'

c)

F = A’+BC

d)

F = A+B'C'

49.

The Karnaugh map for a SOP function is given below in Fig.1. Determine the simplified SOP Boolean expression.

a)

F = BD+B'C'+A'C'D

b)

F = B'D'+BC+A'C'D

c)

F = B'D'+B'C'+ACD

d)

F = B'D'+B'C'+A'C'D

50.

A minterm is

a)

The minimum term in a Boolean function

b)

A prime implicant

c)

A square on a karnaugh map

d)

Always smaller than a maxterm

51.

K-map is used for _______

a)

logic minimization

b)

logic gate creation

c)

summing of parity bits

d)

ALL

52.

There are a total of ______ cells in a K-map with 5 variable.

a)

32

b)

13

c)

16

d)

all

53.

Who has invented K-map?

a)

Maurice Karnaugh

b)

Edward Veitch

c)

sunil dutt

d)

George Boole

54.

Karnaugh maps are planar areas divided into ____ equal cells, each representing a point for a function of n variables.

a)

2ⁿ

b)

2ⁿ⁺¹

c)

2

d)

All

55.

Minimizing such functions can be achieved by converting them into standard forms such as ____, then making the k-map and obtaining the minimized function.

a)

SOP

b)

POS

c)

BOTH SOP and POS

d)

all

56.

The prime implicant which has at least one element that is not present in any other implicant is known as ___________

a)

Compliment

b)

Implicant

c)

Essential Prime Implicant

d)

all

57.

Which of the following statements accurately represents the two BEST methods of logic circuit simplification?

a)

Boolean algebra

b)

K map

c)

Both

58.

SOP meant for

a)

Product terms summing

b)

Sum terms summing

c)

Sum terms product

d)

product terms product

59.

POS meant for

a)

Product terms Product

b)

Sum terms product

c)

Sum terms summing

d)

Product terms summing

60.

If we product all the minterms the result will be

a)

1

b)

0

c)

X + X'

d)

X*X'

61.

If we sum all existed minterms for given three variable (X,Y,Z) the result will be equal to

a)

1

b)

0

c)

X + X'

d)

X*X'

62.

If number of variables are 7, the possible number of minterms and maxterms

a)

127 minterms, 127 maxterms

b)

128 minterms, 128 maxterms

c)

128 minterms, 0 maxterms

d)

0 minterms, 128 maxterms

63.

$F\left(A,B,C\right)\ =\ \Sigma m\left(1,2,4,7\right)\ is\ equal\ to$

a)

$F\left(A,B,C\right)\ =\ \Sigma m\left(0,3,5,6\right)$

b)

$F\left(A,B,C\right)\ =\ \Pi M\left(0,3,5,6\right)\$

c)

$F\left(A,B,C\right)\ =\ \Pi M\left(1,2,4,7\right)$

d)

None

64.

A is a variable, According to boolean law: A + 1 = ?

a)

1

b)

0

c)

A

d)

A' ( ' represents complement)

65.

The simplified result will be Y = (A'+B)+((AB')C)

a)

A'+B'+C'

b)

A+B'+C'

c)

A'+B'+C

d)

A'+B+C

66.

X(X'+Y+X) the simplified result will be (use boolean laws)

a)

X

b)

X'

c)

Y

d)

X+Y

67.

(X+Y)(X'+Y')(XY'+1)+X

a)

1

b)

X+Y

c)

X+Y'

d)

X'+Y'

68.

Demorgan's laws states that

a)

X'+Y' = (XY)'

b)

(X+Y)' = X'Y'

c)

(X+Y)' = X'+Y'

d)

X'Y' = (XY)'

69.

If we sum all the maxterms the result will be equal to

a)

1

b)

0

c)

X+X'

d)

XX'

70.

If we product all existed maxterms for given three variable (X,Y,Z) the result will be equal to

a)

0

b)

1

c)

X+X'

d)

XX'

71.

F(X,Y,Z) = XZ + Z(X'+XY) is equivalent to the most simplified Boolean representation for F is

a)

Z+YZ

b)

Z+ XYZ

c)

XZ

d)

X+YZ

e)

None of the above

72.

Which one of the below consists CARRY bit

a)

Logical addition

b)

Binary addition

c)

Both

d)

None

73.

Two Demorgan's laws are equal to below logic gates

a)

NAND and AND

b)

NAND and NOR

c)

NOR and OR

d)

AND and OR

74.

Minterm and Maxterms are also called

a)

Standard Product and Normal SUM

b)

Standard Product and Standard SUM

c)

Standard SUM and Standard Product

d)

Standard SUM and Normal Product

75.

In boolean algebra, a variable has ______ different state(s)/value(s)

a)

😎 1

b)

😇 2

c)

🤞 3

d)

🙄 4

76.

(X+Y)(X+Y')(X'+Y)+Y

a)

X

b)

X+Y

c)

XY

d)

Y

77.

AD+ABCD+ACD+A'B+AC'D+A'B' on minimization result into

a)

A + D

b)

A' + D

c)

AD + A'

d)

AD

78.

What if two inputs of EX-OR gate are complemented

a)

EX-OR gate

b)

EX-NOR

c)

Not able to decide

d)

None

79.

A (EX-NOR) 1 and A (EX-OR) 0 is equal to

a)

Both are A

b)

A' and A

c)

Both are A'

d)

Both are 0

e)

Both are 1

80.

What if both inputs of a NAND gate are shorted and make it one input

a)

NOT gate

b)

Buffer gate

c)

Nothing change in the NAND operation

d)

NAND will become AND

81.

EX-NOR gate output will be connected as a same input to NOR gate two inputs the resultant change in the operation is

a)

EX-NOR

b)

EX-OR

c)

AND

d)

NOR

e)

OR

82.

Number of cells in the 4 - variable K-MAP

a)

4

b)

16

c)

12

d)

8

83.

K-MAP is used for..........

a)

Boolean functions minimizations

b)

Boolean functions maximization

c)

Boolean functions minimization without using boolean laws

d)

None

84.

The given function is in Sum of Product, each cell in K-Map is represented as a

a)

Maxterm

b)

Standard Product Term

c)

Product term

d)

Sum term

85.

$Y\left(a,b,c\right)\ =\ \Sigma m\left(1,2,4,7\right)$

a)

Y = A (xor) B (xor) C

b)

Y = A (xnor) B (xnor) C

c)

Y = A (xnor) B (xor) C

d)

Y = A (xor) B (xnor) C

86.

In the 3-variable k-map is having following pattern?

a)

Binary pattern

b)

Gray pattern

c)

BCD pattern

d)

EX-3 pattern

87.

$f\left(A,B,C\right)\ =\ \Sigma m\left(0,2,3,4,5,6\right)$

a)

A'B+AB'

b)

A'B+AB'+C

c)

AB+A'B'+C

d)

A'B+AB'+C'

88.

If number of variables are 5, number of cells containing 1's grouped are 16 (Hexatet), number of literals present in the resulting term and number of variables eliminated

a)

0,5

b)

1,4

c)

2,3

d)

3,2

e)

4,1

89.

If number of variables are 3, number of cells containing 1's grouped are 4 (Quad), number of literals eliminated in the resulting term and number of variables presented

a)

3,1

b)

2,1

c)

1,2

d)

0,3

e)

3,0

90.

$F\ \left(A,B,C,D\right)\ =\ \Sigma m\left(0,1,2,3,5,7,8,9,10,12,13\right)$

a)

F = B'D'+AC'+A'D

b)

F = BD'+AC+A'D

c)

F = B'D'+AC'+A'D'

d)

F = B'D'+A'C'+A'D

91.

$F\left(A,B,C\right)\ =\ \Sigma m\left(2,3,4\right)+d\left(0,1,6\right)$

a)

A+C

b)

A'+C'

c)

A+C'

d)

A'+C

92.

Find sop expression for the K-MAP

a)

X'Y' + W'

b)

XY + YW

c)

XY' + W'

d)

X'Y + W

93.

$\left[D'+AB'+A'C+AC'D+A'C'D\right]'$
The number of min-terms after minimizing the above boolean expression is

a)

1

b)

3

c)

2

d)

4

94.

$X\left(a,b,c,d\right)\ =\ \Sigma m\left(0,5,6,8,15\right)\ +\ \Sigma d\left(2,3,7,9,10,13\right)$

a)

dc'a' + ac + db'

b)

acd + ac+ a'b'c'd

c)

bd + a'c + b'd'

d)

a'c'd + ab'c'd + cd

95.

$F\left(A,B,C,D\right)\ =\ \Sigma m\left(1,2,4,7,8,11,13,14\right)$
The total number of single mapped

a)

4

b)

8

c)

3

d)

5

96.

$S\ \left(A,B\right)\ =\ \Sigma m\left(1,2\right)\ and\ C\left(A,B\right)\ =\ \Sigma m\left(3\right)$

a)

S = AB, C = A xnor B

b)

S = A xor B, C = AB

c)

S = AB, C = AB

d)

S = A xor B, C = A xor B

97.

Boolean expression

(X+Y)(X+Y') + ((XY')+X')' simplifies to

a)

X

b)

Y

c)

XY

d)

X + Y

98.

The circuit shown in figure below generates the function of

a)

X xor Y

b)

XY' + X'Y

c)

XY'

d)

XY' + XY + XY'

e)

0

99.

The number of bytes required to represent the decimal number 1856357 in packed BCD (Binary Coded Decimal) form is

a)

4

b)

5

c)

6

d)

7

100.

The output F found to be logic 1 when A = 0, The values of B and C are

a)

B = 1, C = 0

b)

B = 0, C = 0 or 1

c)

B = 1, C = 1

d)

indeterminate

101.

In the logic equation

A(A + B'C' + C) + B'(C' + A' + BC) + (A + B'C + AC') = 1,

if C = A' then

a)

A + B = 1

b)

A' + B = 1

c)

A + B' = 1

d)

A = 1

POP TEST 2

Total questions: 101

Worksheet time: 2hrs 48mins

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