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WorksheetsDigital Electronics
Total questions: 95
Worksheet time: 3hrs 10mins
Name
Class
Date
1.
Digital system have _______states
a)
one
b)
two
c)
three
d)
four
2.
Analog signal is a _______signal
a)
Continuous
b)
Discrete
c)
periodic
d)
nonperiodic
3.
Clock signal is _______ in nature
a)
Sine wave
b)
Square wave
c)
Sawtooth wave
d)
spike
4.
In positive logic system +5VDC is _______ & 0V is_______ Level
a)
low & high
b)
high & low
c)
low & low
d)
high & high
5.
In negative logic system +5VDC is _______& 0V is _______ Level
a)
low & high
b)
high & low
c)
low & low
d)
high & high
6.
IC stands for _______
a)
Initial Circuit
b)
Integrated Circuit
c)
Input Circuit
d)
Inverted Circuit
7.
SSI stands for _______
a)
Single Scale Integration
b)
Similar Scale Integration
c)
Small Scale Integration
d)
Segment scale Integration
8.
MSI stands for _______
a)
Mode Scale Integration
b)
Mean Scale Integration
c)
Multiple Scale Integration
d)
Medium Scale Integration
9.
LSI stands for _______
a)
Large Scale Integration
b)
Lead Scale Integration
c)
Level Scale Integration
d)
Light Scale Integration
10.
VLSI stands for _______
a)
Very large Scale Integration
b)
Variable lead Scale Integration
c)
variable level Scale Integration
d)
Very light Scale Integration
11.
The base of decimal number system is _______
a)
8
b)
2
c)
10
d)
16
12.
The base of binary number system is _______
a)
2
b)
8
c)
16
d)
10
13.
The base of hexadecimal number system is _______
a)
16
b)
8
c)
10
d)
2
14.
The base of octal number system is _______
a)
2
b)
10
c)
16
d)
8
15.
The hexadecimal number system composed of _______digits and_______alphabets
a)
9 and 7
b)
10 and 6
c)
6 and 9
d)
6 and 10
16.
The decimal number system is composed of _______digits
a)
8
b)
10
c)
2
d)
16
17.
The binary number system is composed of _______digits
a)
10
b)
2
c)
16
d)
8
18.
The octal number system is composed of _______digits
a)
8
b)
2
c)
16
d)
10
19.
The 9’s complement of 274 is _______
a)
626
b)
826
c)
725
d)
726
20.
The 10’s complement of 758 is _______
a)
243
b)
242
c)
352
d)
354
21.
The 1’s complement of 10110011 is _______
a)
1001010
b)
1001001
c)
1000010
d)
1001100
22.
The 2’s complement of 10101011is _______
a)
1010100
b)
1010110
c)
101011
d)
1010101
23.
The binary equivalent of decimal 34 is _______
a)
100010
b)
101010
c)
111100
d)
110011
24.
The decimal equivalent of binary 101010 is _______
a)
52
b)
42
c)
48
d)
50
25.
The octal equivalent of binary 101110001 is _______
a)
462
b)
561
c)
653
d)
571
26.
The binary equivalent of octal 472 is _______
a)
101110010
b)
100101101
c)
100111010
d)
100101101
27.
The octal equivalent of decimal 20 is _______
a)
25
b)
24
c)
34
d)
35
28.
The octal equivalent of hexadecimal B5 is _______
a)
343
b)
265
c)
345
d)
346
29.
The decimal equivalent of octal 64 is _______
a)
42
b)
43
c)
52
d)
53
30.
The decimal equivalent of hexadecimal 1B is _______
a)
35
b)
36
c)
26
d)
27
31.
The hexadecimal equivalent of binary 11001001 _______
a)
C9
b)
CA
c)
B9
d)
C8
32.
The hexadecimal equivalent of octal 237 is _______
a)
8F
b)
9F
c)
9E
d)
8E
33.
The BCD code is also called _____
a)
8421
b)
ASCII
c)
EBCDIC
d)
Alphanumeric
34.
The Gray code for decimal number 9 is equivalent to
a)
1100
b)
1001
c)
1101
d)
1110
35.
The Gray codeis an --------------- code
a)
Unweighted
b)
Alphanumeric
c)
Weighted
d)
8421
36.
The_______code exhibits a single bit change from one code number to the next
a)
BCD
b)
ASCII
c)
EBCDIC
d)
Gray
37.
The NOT gate is also called _______
a)
Inverter
b)
Converter
c)
Comparator
d)
Adder
38.
The gate used for logical multiplication is _______
a)
AND
b)
OR
c)
NOT
d)
XOR
39.
The gate used for logical addition is _______
a)
AND
b)
OR
c)
XOR
d)
NOT
40.
If A and B are the inputs the output expression for AND gate is _______
a)
Y = A+B
b)
Y = A-B
c)
Y = AB
d)
Y = A/B
41.
If A and B are the inputs the output expression for OR gate is _______
a)
Y = A/B
b)
Y = A-B
c)
Y = AB
d)
Y = A+B
42.
If A and B are the inputs the output expression for NAND gate is _______
a)
Y = A+B
b)
Y = A-B
c)
Y = AB
d)
Y = (AB)'
43.
If A and B are the inputs the output expression for NOR gate is _______
a)
Y = (A+B)'
b)
Y = A-B
c)
Y = AB
d)
Y = A+B
44.
If A and B are the inputs the output expression for XOR gate is_______
a)
Y = A’B+AB’
b)
Y = A-B
c)
Y = AB
d)
Y = A+B
45.
The IC 7404 is _______ gate
a)
AND
b)
NAND
c)
NOR
d)
NOT
46.
The IC 7408 is _______ gate
a)
NOT
b)
OR
c)
AND
d)
NOR
47.
The IC 7432 is _______ gate
a)
OR
b)
AND
c)
NAND
d)
NOR
48.
If all the inputs of an AND gate is high then the output is_______
a)
low
b)
high
c)
high to low
d)
medium
49.
If all the inputs of a NAND gate is low then the output is_______
a)
High
b)
high to low
c)
low
d)
medium
50.
If any one input of an AND gate is low then the output is_______
a)
high
b)
medium
c)
low to high
d)
low
51.
If any one input of a NAND gate is low then the output is_______
a)
High
b)
medium
c)
low to high
d)
low
52.
If all the inputs of an OR gate is low then the output is_______
a)
High
b)
low
c)
low to high
d)
medium
53.
If all the inputs of a NOR gate is low then the output is_______
a)
low
b)
medium
c)
high
d)
high to low
54.
If any one input of an OR gate is high then the output is_______
a)
medium
b)
low
c)
low to high
d)
high
55.
If any one input of a NOR gate is high then the output is _______
a)
low
b)
high
c)
medium
d)
low to high
56.
Time interval between the application of an input pulse and the occurance of resulting output is _______
a)
propagation delay
b)
rise time
c)
fall time
d)
noise immunity
57.
The propagation delay of standard TTL gate is _______
a)
100ms
b)
50ms
c)
100ns
d)
10ns
58.
The product of _______ and average supply current is power dissipation
a)
capacitance
b)
resistance
c)
supply voltage
d)
Inductance
59.
The DC noise margin of a logic gate is the measure of its _______
a)
fan out
b)
fan in
c)
propagation delay
d)
Noise immunity
60.
The ability of a gate to withstand fluctuations of the voltage levels at its input is _______
a)
fan in
b)
fanout
c)
Noise immunity
d)
propagation delay
61.
The standard TTL gate has a fanout of _______
a)
one
b)
five
c)
ten
d)
two
62.
In boolean addition 1+ 1 = _______
a)
1
b)
two
c)
10
d)
11
63.
The logical expression for an AND gate is_______
a)
Y = AB
b)
Y = A+B
c)
Y = (AB)'
d)
Y = (A+B)'
64.
The logical expression for an OR gate is _______
a)
Y = (A+B)'
b)
Y = AB
c)
Y = A+B
d)
Y = (AB)'
65.
The logical expression for a NAND gate is _______
a)
Y = (AB)'
b)
Y = (A+B)'
c)
Y = AB
d)
Y = A+B
66.
In boolean algebra A.0 =_______
a)
A
b)
1
c)
2
d)
A'
67.
In boolean algebra A.1= _______
a)
1
b)
2
c)
A
d)
A'
68.
In boolean algebra A+A= _______
a)
A
b)
2A
c)
1
d)
2
69.
In boolean algebra A.A'= _______
a)
A'
b)
A
c)
1
d)
2
70.
In boolean algebra A''= _______
a)
1a
b)
1
c)
2A
d)
A'
71.
In boolean algebra A+AB= _______
a)
AB
b)
A+B
c)
A
d)
B
72.
In boolean algebra A+A'B= _______
a)
A+B
b)
AB
c)
B
d)
A'
73.
In boolean algebra (A+B) (A+C)= _______
a)
A+B
b)
AB
c)
AB'
d)
A+BC
74.
In commutative law A+B = _______
a)
AB
b)
B+A
c)
A'+B'
d)
A'B'
75.
In associative law A+(B+C)= _______
a)
AB+AC
b)
A+B
c)
(A+B)+C
d)
ABC
76.
In distributive law A(B+C) =_______
a)
AB+AC
b)
A+B
c)
(A+B)+C
d)
AB+AC
77.
The complement of a product is equal to ________of the complements
a)
sum
b)
product
c)
square
d)
double
78.
The complement of a sum is equal to ________of the complements
a)
sum
b)
product
c)
square
d)
double
79.
In a four variable Karnaugh map looping of eight adjacent cells gives a _______
a)
2 variable term
b)
3 variable term
c)
single variable term
d)
4 variable term
80.
In a four variable Karnaugh map looping of four adjacent cells gives a _______
a)
2 variable term
b)
3 variable term
c)
single variable term
d)
5 variable term
81.
In a four variable Karnaugh map looping of two adjacent cells gives a _______
a)
2 variable term
b)
3 variable term
c)
single variable term
d)
6 variable term
82.
A Karnaugh map with 4 variables has _______ cells
a)
2
b)
4
c)
8
d)
16
83.
A Karnaugh map with 3 variables has_______cells
a)
2
b)
4
c)
8
d)
16
84.
A Karnaugh map with 2 variables has_______cells
a)
2
b)
4
c)
8
d)
16
85.
The standard AND-OR Logic consists of ____ AND gate and ____ OR gate.
a)
2 , 1
b)
1,2
c)
3,2
d)
2,3
86.
The expression for XOR gate is___________
a)
Y = A'B + AB'
b)
Y = AB+ A'B'
c)
Y = A+B
d)
y = AB
87.
An AND gate can be implemented using ______NAND gates
a)
one
b)
two
c)
three
d)
four
88.
An OR gate can be implemented using ______NOR gates
a)
one
b)
two
c)
three
d)
four
89.
The universal gates are _________ & ______
a)
NOT , AND
b)
AND,NAND
c)
OR,NOR
d)
NAND,NOR
90.
If both inputs of XOR gate is same, then the output will be
a)
zero
b)
one
c)
high
d)
positive
91.
If any one a two input of XOR gate is one, then the output will be
a)
zero
b)
one
c)
low
d)
positive
92.
A half adder has __________inputs & ___________ outputs
a)
2,1
b)
1,2
c)
2,2
d)
2,3
93.
A full adder has __________inputs & ___________ outputs
a)
2,2
b)
3,2
c)
2,3
d)
2,1
94.
A half adder adds ________bits at a time
a)
2
b)
3
c)
1
d)
4
95.
A full adder adds ________bits at a time
a)
1
b)
2
c)
3
d)
4
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